1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, which includes encapsulating the lead frame in a molding die with a resin.
2. Background Art
Japanese Laid-Open Patent Publication No. H05-185467 discloses a technique for mounting a lead frame in a recessed portion of a molding die and encapsulating the lead frame with a resin. This technique crushes down portions of the periphery of the lead frame to form lateral projections. These lateral projections block up the gap (hereinafter referred to as the clearance) between the lead frame and the side surface of the recessed portion of the molding die at which the gate opens. When a molding resin is injected through the gate after forming the lateral projections, the molding resin is blocked by these lateral projections. This prevents attachment of the molding resin to the terminals of the lead frame.
It has been found, however, that if the lateral projections are formed when the clearance is large, they may not be able to reach the facing side surface of the recessed portion and hence may not able to block up the clearance. In order to prevent this from happening, the recessed portion may be narrowed so as to reduce the size of the clearance beforehand. However, this has resulted in an inability to accommodate variations (manufacturing variations) in the size of the lead frame, and some larger lead frames have been accidentally pinched between the upper and lower dies.